T 0693/90 11-08-1992

Reasons for the Decision

1. Inventive step - Claim 1 of the main request

1.1. From document D1 there is known in accordance with the wording of Claim 1:

"A semiconductor device comprising: a semiconductor substrate (see D1, 26 in Figure 3L); a logic circuit region (see dashed lines forming squares in Figure 5) arranged in the semiconductor substrate, said logic circuit region having a plurality of logic circuits (Figure 6); a peripheral circuit region arranged around said logic circuit region (surrounding the chess-board like central area in Figure 5), said peripheral circuit region including a plurality of output buffer circuits (T9 in Figure 5, 101 in Figure 7 and Figure 12); a first power line (117 in Figure 9) and a second power line (109 in Figure 9 and 113, 114 in Figure 7) distributed at least along the peripheral circuit region, said first power line being connected to each of said output buffer circuits (see potential Vcc at first power line 117 in Figure 9 and Vcc at the output buffer circuit in Figure 12)."

Contrary to the Respondent's view in paragraph VII(a), a comparison of the mask in Figure 9 for the uppermost second metallisation layer with the mask in Figure 7 for the lowermost first metallisation layer results in the fact that the two outer U-shaped frame-like bus parts of the first power line 117 in Figure 9 overlap directly transistors 101 in Figure 7. They also have under themselves electrical connections to these transistors; see the mask for the through holes in Figure 8, the equidistant system of line-shaped through holes neighbouring directly the via holes 124 of ground distribution bus system 117, which each lead to the outer U-shaped electrode of transistors 101 in Figure 7 respectively. The fact that the second power line is as well "distributed at least along the peripheral circuit region" as claimed, follows directly from the contours of outermost line-shaped busses 109 in Figure 9 and 114 in Figure 7.

1.2. Starting from document D1, the objective problem underlying the patent in suit is to make the voltage drop in the power lines of an LSI - (large scale integration) - circuit as small as possible in order to avoid malfunctions in the LSI circuit with high levels of integration and large number of pins; see the patent in suit, column 1, lines 46 to 50, column 2, lines 18 to 21, and column 3, lines 27 to 34.

1.3. This problem is solved by the features distinguishing the subject-matter of Claim 1 from the prior art according to document D1, i.e. by:

"a sub-power line distributed on an insulating layer separating it from said first power line; in which electric shorts are formed between said first power line and said sub-power line via through holes in said insulating layer at each portion of said first power line under which is it connected to one of said output buffer circuits".

The above solution inter alia allows to halve the inherent resistance of the original power line; see the patent in suit, column 2, lines 28 and 29.

1.4. The general principle of the claimed solution of the objective problem, i.e. to avoid malfunctions in an LSI- circuit which are caused by voltage drops in power lines, by reducing the effective resistance of the power lines via an additional sub-power line, is known from document D5; see document D5, page 1, lines 28 to 35, page 5, lines 20 to 31 and additional line 3 in Figures 1 and 2. In the Board's view, a skilled person is able to recognise that the thickness and fineness problem of power lines and its solution according to document D5 - as put forward by the Respondent in paragraph VII(c) above - represents independent technical information which has no functional influence on the teaching to prevent malfunction by resistance reduction. Therefore, despite this separate technical information in document D5, document D5 teaches a skilled person unambiguously to solve the objective problem underlying the patent under appeal by increasing the effective current guiding cross-section of a power line via a supplementary line and thus encourages a skilled person to consult the prior art with regard to known realisations of an electric line plus a supplementary one for the purpose of lowering the effective resistance. Thus, in the Board's view, document D5 reduces the objective problem underlying the patent under appeal to the technical aim of lowering the effective resistance of a power-line, and guides a skilled person to consider the use of the teaching of document D4 in the device disclosed in document D1.

1.5. From document D4, there is known in the subsequent wording of Claim 1:

"a sub- ... line (see D4, 3 in Figure 2; and page 5, lines 19 to 22) distributed on an insulating layer (4 in Figure 2) separating it from said first ... line; in which electric shorts are formed between said first ... line and said sub- ... line via through holes (5, 6) in said insulating layer".

The teaching of Figure 2 of document D4 is not limited to any particular use but is quite generally presented in document D4 as a means to halve the effective line resistance; see D4, page 6, lines 7 to 10. In the Board's view, the fact that document D1 is already equipped with two metallisation planes renders an application of a line- and sub-line-arrangement in different metallisation planes according to document D4 rather appropriate. Moreover, the Board regards a skilled person to be able to foresee that, by separating lines 2 and 3 of Figures 1 and 2 of document D5 into two different metallisation layers with an interposed separating insulation layer, any thickness problems of the power lines can be avoided. Thus, it is obvious to a skilled person not to limit himself to the explicit particular teaching of document D5 but to make use of this evident additional advantage of the interposed insulation layer according to document D4.

Also the embodiments in Figures 4 and 6 of document D4 which are narrowed down to signal lines, would in the Board's view not prevent a skilled person from recognising that - contrary to the Respondent's view in paragraph VII(d) - the teaching of document D4 may without technical difficulties also be used in a power line in order to halve its resistance. A skilled person is supposed to know that the effect of reducing the resistance is based on the creation of a supplementary additional current guiding channel and thus on a volume effect which is independent from the resistance properties of the line material and, within the first order approximation of Ohm's Law, also independent from any value of the current density.

1.6. It remains to be discussed, whether a skilled person can be expected to shift shorts 27 in Figure 4 (or 36 in Figure 6) of document D4 from their position laterally displaced from contact electrode 23 (or 33 in Figure 6) to portions of power line 117 of Figure 9 of document D1, under which this line is connected to one of transistors 101 (see also paragraph 1.1 above). A skilled person - in the Board's view - recognises that the position of shorts 27 or 33 on top of the thick oxide layers 22 or 32 is a planarisation measure in order to level out layer distortions caused by the relatively thin gate oxides, that it has nothing to do with resistance lowering, and that the short stops the parallel connection of line and sub-line and thus the resistance lowering effect. The Board regards it to be within the normal logical thinking of the skilled person that - in order to make full use of the halving effect of the effective resistance - the shorts should be provided at the beginning and at the end of the power transmission way and should approach the location of the power consumer as much as possible. Thus - contrary to the implicit view of the Respondent in paragraph VII(d) - in the Board's view, the remaining feature in Claim 1:

shorts formed "at each position of said first power line under which it is connected to one of said output buffer circuits"

has the character of a purely logical adaptation measure for making optimal use of the teaching of document D4 in the multi-layer system of document D1 which measure only needs the routine skill of an expert and will be taken into consideration by him automatically. The fact that the alignment of short and output buffer balances extra costs for the production of sub-line, as the Respondent put forward in paragraph VII(e) above, represents an extra effect (bonus) of an obvious measure which - according to the normal practice of the Boards of Appeal of the EPO -is to be disregarded in the evaluation of an inventive step; see also T 21/81, OJ EPO 1983, 15.

1.7. The technically diverging solutions of the voltage drop problem put forward by the Respondent in paragraph VII(b) above, do not cast any technical doubts on the feasibility and on the reliability of the stated advantageous effects of the teachings disclosed in document D5 and D4 and thus, in the Board's view, do not discourage a skilled person from applying them in the device of document D1.

1.8. For these reasons, the Board considers that the subject- matter of Claim 1 of the main request is the result of a use of the teaching of document D4 in the device of document D1 combined with a logical one-way-street-like adaptation measure, which use is rendered obvious by the fact that document D5 informs a skilled person that the teaching of document D4 solves the objective problem underlying the patent under appeal. Therefore, in the Board's judgment, Claim 1 of the main request lacks an inventive step within the meaning of Article 56 EPC.

2. Claims 2 to 8 of the main request fall because of their dependency on Claim 1.

3. Auxiliary request

At the end of the oral proceedings the Respondent put forward the auxiliary request that the patent be maintained on the basis of the combination of Claims 1, 6 and 7.

It should be noted that according to the jurisprudence of the Boards of Appeal "a Board of Appeal may refuse to consider alternative claims which have been filed at a late stage, e.g. during the oral proceedings, if such claims are not clearly allowable"; see Decision T 153/85, OJ EPO 1988, 1, Headnote II.

This principle applies equally in examination and opposition proceedings (see also e.g. Decision T 95/83, OJ EPO 1985, 75). The necessity for amendments to be proposed in good time before oral proceedings has also been made clear in the "Guidance for Appellants and their Representatives" which has been published regularly in the Official Journal (most recently in OJ EPO 1989, 395).

In the present case, the Board had already informed the Respondent in the communication accompanying the summons for oral proceedings that no characteristic of inventive nature could be seen in the subject-matter of dependent Claims 2 to 8, and had requested the parties to file any further written observations at least one month before the date of the oral proceedings. The Respondent did not follow this invitation. Furthermore when the Respondent put forward his proposal during the oral proceedings, the Appellant stated that he was taken by surprise and was not in a position immediately to deal with such an auxiliary request.

In the Board's judgment, especially having regard to the Board's preliminary views set out in the communication accompanying the summons and referred to above, the auxiliary request is certainly not clearly allowable, and having regard also to the statements of the Appellant, this auxiliary request is not admissible at such a late stage in the appeal proceedings.

Furthermore, the Board would have reached the same conclusion as to the inadmissibility of the request even if the Board's communication accompanying the summons had not requested any further written observations to be filed at least one month before the oral proceedings.